PART |
Description |
Maker |
ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 Radiation Hardened Dual D Flip Flop with Set and Reset D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
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INTERSIL[Intersil Corporation]
|
74ALS74A 74ALS74AD 74ALS74ADB 74ALS74AN 74ALS74 |
Dual D-type flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
PHILIPS[Philips Semiconductors] NXP Semiconductors N.V.
|
74HC74DR2 74HC74DR2G 74HC74D 74HC74 74HC74DTR2G 74 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS Dual D Flip-Flop with Set and Reset(带设置和复位的双D触发 双D触发器的设置和复位(带设置和复位的双触发器)
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ONSEMI[ON Semiconductor]
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MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H6 |
3.3V / 5V ECL 4-Input OR/NOR 3.3V / 5VECL 8-Bit Serial/Parallel Converter Dual Binary 1-4-Decoder (High) 5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset 9-Bit TTL-ECL Translator Quad TTL-ECL Translator Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate 3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter 3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable 3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator 3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock 5V ECL Voltage Controlled Oscillator 3.3V ECL D-Type Flip-Flop with Set and Reset Binary to 1-8 Decoder (Low) Differential -5V ECL To TTL Translator -3.3V / -5V Triple ECL Input to PECL Output Translator 5V ECL Dual Differential 2:1 Multiplexer Quad MSTR 5V ECL Quad 4-Input OR/NOR Gate 3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset Dual 4-5-Input OR/NOR
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ON Semiconductor
|
MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator 5V ECL Low Impedance Driver Dual Type D Master-Slave Flip-Flop ECL/TTL Clock Driver 3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock 3.3V / 5V ECL ÷4 Divider Quad 2-Input NOR Gate 3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset 3.3V / 5V Hex Differential Line Receiver / Driver 3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
74ALS109AN 74ALS109A 74ALS109AD |
Dual J-K positive edge-triggered flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
|
Rochester Electronics, LLC PHILIPS[Philips Semiconductors] NXP Semiconductors
|
CD54AC113A CD54ACT112 CD54AC112 CD54ACT113A |
Dual J-K Flip-Flop with Set and Reset Dual “J-K” Flip-Flop with Set and Reset Dual “J-K?/a> Flip-Flop with Set and Reset Dual “J-K Flip-Flop with Set and Reset
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INTERSIL[Intersil Corporation]
|
CD54AC109 CD54AC103A CD54ACT109 CD54ACT103A CD54AC |
Dual J-K Flip-Flop with Set and Reset
|
INTERSIL[Intersil Corporation]
|